by Nils van den Heuvel, budding CPU architect
Around the beginning of 2021, in the midst of the COVID epidemic, I contacted the editor of DENA, Max, via email, saying:
“Please allow me to introduce myself. I’m Nils van den Heuvel, an Electronics Engineer (University of Twente) working at ASML as an Electrical Architect. My 16-year-old son Otto is interested in building an arithmetic logic unit (ALU) and making his own processor in standard digital logic, so I’ve been looking for interesting 4-bit processor designs.
After some deep diving on Intel’s 4004, looking at its assembly code, I came across your idea for a 4-bit computer. I was starting with the electronics for a microcontroller unit (MCU), but your site is starting from the instruction-set down. Pretty interesting. I like what you are doing. What are the latest developments? Any assembler developed yet? Or any perspectives on actual hardware? Maybe I could hook onto some project. My plan would be to design the digital architecture, get the micro instructions sorted out, set up and test the logic in Intel Quartus logic design software for FPGAs (using standard logic). And finally create a physical realization using KiCad and my soldering iron.”
Max responded immediately and included his friend Joe, who had built an emulator for this instruction set. From that time, we frequently had Zoom meetings to discuss this project and other things. This was a great challenge for me because I had no idea how to design an MCU. But Max and Joe provided valuable input.
The Geeks for Geeks site and Max’s DIY Calculator Data Book provided many basic ideas to design the ALU and optimize its logic using Karnaugh diagrams. I managed to complete the design of the 4-bit ALU, capable of performing all arithmetic and logic functions. The next step was to implement the required 4-bit data and 12-bit address storage registers and tristate switches. Finally, the MCU needed “brains” to execute the assembly commands, each requiring a defined set of actions in the form of microcodes. I decided to use state machine logic to make this a “clever” processor, with commonality and re-use of microcode actions. A structural design approach for these state machines was needed: starting from a state diagram, then moving to the transition equations, and finally to the logic implementation. By the end of 2022, I managed to get the MCU running on an Altera MAX10 (FPGA) demo board with an Arduino Due emulating its memory.
In addition to the FPGA implementing the MCU, a second Altera MAX V CPLD is used as IO-controller, providing memory and clock options, an IO-tester, and manual programming capability. An interface to the Arduino Due can be used to program on-board RAM and ROM memory. Schematic design, layout, and a 3D view were realized in KiCad. The board was produced and assembled by Eurocircuits in Hungary. A few design corrections were required, for which I used an Andonstar microscope and a 1mm soldering tip. By the start of 2025, my 4-bit MCU board was fully functional! Now I need to decide on my next step…