I love the smell of fresh silicon chiplets in the morning. Ever since we created the first monolithic integrated circuits in 1959, we’ve managed to squeeze more and more transistors onto a silicon die. Today’s high-end silicon chips can contain tens of billions of transistors.
This has involved a combination of technologies, including the development of smarter, higher performance, higher capacity design and verification tools, shrinking process geometries (bleeding-edge companies like Apple are now developing devices at the 3nm technology node), and the evolution of extreme ultraviolet (EUV) lithography.
The largest monolithic device we can currently produce is around 25×25mm2 (625 square millimeters) before yields start falling to unacceptable levels. The solution is to take multiple dice (commonly called “chiplets” or “tiles”), mount them on a common substrate (typically a silicon interposer), and present everything in a single package. The result is known as a “multi-die system.”
Until recently, the only people using chiplets were outlier companies like Intel who exert total control over the entire fabrication process. The dream is for developers to be able to build their own chiplets and combine them with hard chiplet IP from multiple vendors
to create multi-die systems. This dream is poised to become reality. Within the past couple of months, several companies have emerged from stealth mode. Three of these companies—Eliyan, YorChip, and Zero ASIC—are featured in this issue of DENA.
Also, DENA is an official media partner for the Chiplet Summit, which is taking place 6-8 February 2024 at the Santa Clara Convention Center. As the Chiplet Summit folks like to say, “This is going to be HUGE!”