Imperas Software has announced the beta release of its ImperasDV architectural validation test suites for RISC-V Physical Memory Protection (PMP).  

Imperas Software’s CEO, Simon Davidmann, said: “In any verification plan, the opportunity to use more tests is always a useful option, but as is often the case some tests are more useful than others. Test suites have many useful qualities, perhaps the top two are coverage and specification completeness.  

“The RISC-V PMP test requirements are significant given the complexity of the specification and security implications for any implementation errors. The Imperas mutating fault simulation technology ensures the test coverage, and the Imperas reference model covers the full envelope of the PMP specification, so when combined these produce a useful architectural validation test suite for any RISC-V processor targeted at security applications.” 

Chair of the RISC-V International Architecture Test SIG, Esperanto Technologies’ Allen Baum, added: “A key part of the RISC-V privilege specification that is fundamental for OS and application security is the PMP feature. Enabling its correct operation is essential for security applications, and the Imperas PMP test suites are a valuable contribution to the RISC-V compatibility and verification community.” 

Imperas.com