2023 will see several initiatives becoming more commercially robust. For example, the continued commercialization of the RISC-V ISA. We will see the advent of more advanced application processors, as opposed to the currently available controllers and smaller embedded devices. This in turn will lead to more changes in SoC design and verification given some of the new capabilities that RISC-V brings, such as custom instructions. Multiple providers are supplying these devices with compatibility differences, giving developers a complicated landscape of decisions and creating opportunities for design and verification tool providers.

The growing IC “democratization” movement will offer more advancements in open-source design and verification tools. We can expect more availability of free versions of commercial tools for simpler designs, particularly those in non-traditional applications that include medical and industrial.

Verification engineers will observe the increased use of synthesis for test content. That’s because test content is now the most significant bottleneck in verification, which—in turn—is the most significant bottleneck in IC development.  Companies are looking more closely at using synthesis techniques with languages such as the new Portable Test and Stimulus standard from Accellera. These will become more important, and more verification will be performed at the SoC level with more test content reuse.

Finally, it will become far more apparent in 2023 that IC design verification is growing in importance due to more complex use cases, application segments, device requirements (e.g., safety and security), and extended lifecycles. The requirement for functional verification runs throughout the entire electronic product design and manufacturing supply chain. Without thorough verification, the supply chain could be compromised.