Interest in chiplets is growing as the Chiplet Summit hosts its second annual event.
The Chiplet Summit’s second annual event—to be held at the Santa Clara Convention Center in Santa Clara, California on 6-8 February 2024— focuses on major advances in chiplet technology over the past year. Chiplets are the modular approach chip makers have developed to produce leading edge devices at the most advanced process nodes. Designers can break up very large chips into modules (the chiplets) that are cheaper to produce, have higher yield, and allow for the inclusion of proven designs or ones bought from outside sources.
In a market expected to rise from $6.5 billion in 2023 to $145 billion in 2028, more companies are turning to chiplets and more chiplet-based products are appearing. A huge impetus comes from generative artificial intelligence (GenAI), a revolutionary technology that is sweeping every industry. It takes a lot of work to train and execute large language models (LLMs), such as the famous ChatGPT from OpenAI. This year’s Chiplet Summit has several sessions—including keynotes and panels—that focus on providing the huge computing power required by GenAI.
Chiplet Summit, produced by Semper Technologies, showcases the applications, technologies, and vendors driving the chiplet market. This is the event chip designers cannot miss if they want to stay competitive. They’ll get the scoop on ways to make their chiplets run faster, scale better, use less power, and be more flexible. This unique event gives attendees a place to network with peers, ask questions of the experts, and talk to vendors offering a wide variety of products and services.
First-day tutorials include continuing coverage of advanced packaging technologies and design methodologies, as well as new topics, such as Working with Foundries and AI in Chiplet Design. Also, Open Compute Project (OCP) reports great progress in their drive for an open chiplet economy in which designers can easily find and utilize an entire marketplace of drop-in units. OCP now has a joint standard with JEDEC (JEP 30) for describing chiplets in a way any EDA tool can handle. Meanwhile, this year’s Superpanel will have as its subject How Can Chiplets Accelerate Generative AI Applications?
The second day starts with a plenary on Chiplets: Where We Are Today in which Jawad Nasrullah, CEO of Palo Alto Electron, sets the tone with a talk on Developing Chips for Tomorrow: You, Me, and ChatGPT. Yole Development analysts Tom Hackenberg and John Lorenz follow with a market research talk entitled, Chiplet Markets Are Rising: Where and When?
Second day keynotes come from Applied Materials (AI in semiconductor design), Synopsys (what mature chiplet technology will be like), and Micron (advances in memory technology). Micron speaker Gurtej Sandhu holds almost 1,400 patents, so he is personally responsible for many of the advances he will describe. The UCIe Consortium and incubator/ semiconductor VC firm Silicon Catalyst will offer short presentations on their work with chiplets.
The exhibits include many familiar names such as Applied Materials, Synopsys, Achronix, Arm, Siemens, Cadence, Keysight, and Teradyne, as well as highly touted newcomers such as Alphawave Semi, Eliyan, AIchip, proteanTecs, and Credo Semiconductor. European research groups CEA-List and Fraunhofer IIS are also joining the exhibits.
Second day sessions cover design, security, and interfaces with topics including single-chip servers, network-on-chip (NoC) approaches, and integrated power converters. Panels will discuss leading-edge designs, optimization, and next great breakthroughs, and annual updates will cover design, packaging, and interfaces.
Third day keynotes come from Alphawave Semi on new chip-to-chip interfaces (and how they can help meet the needs of generative AI), Hyperion Technologies on packaging advances (new, larger packages that have 1,000-watt power ratings and can hold an entire supercomputer CPU), and Open Compute Project on the future of the open chiplet economy.
Third day sessions cover such topics as controlling test costs and improving the flow of heterogeneous integration. This day’s panels cover accelerating generative IP, viable markets, best packaging methods, making money with chiplets, and future trends.
Chiplets are definitely the talk of the town for chip designers, and the Chiplet Summit will bring attendees up to date on what has happened recently and what is likely to happen in the next few years. All the major manufacturers, including AMD, Intel, Qualcomm, NVIDIA, and Samsung, are using or considering chiplets for their leading-edge designs, and everyone else will surely follow their lead. The Chiplet Summit is the place to be for those who don’t want to be left behind!
Registration is now open at chipletsummit. com/registration and presentations from this second annual Chiplet Summit will be available on the conference website after the event.
Meet Dr. Leventhal
Dr. Lance A. Leventhal is an independent computer consultant with over 40 years industry experience. He
is currently Program Chairperson for the annual Chiplet Summit. He is the author of 25 books (that have sold over 1,000,000 copies) and 80 technical articles. He
has founded many conferences, including the Flash Memory Summit, Ethernet Technology Summit, and Open Server Summit. He has also been a Series Editor in Programming and Software Development for Pearson/ Prentice-Hall and has edited and developed 50 book projects. He has taught at many universities and served on many conference committees. Dr. Leventhal earned his PhD in Applied Physics and Information Science from the University of California at San Diego.