Field programmable gate arrays (FPGAs) have emerged as a game-changer in space applications. From satellite communications to on-board processing, FPGAs have earned their popularity due to offering unmatched versatility and adaptability in commercial bus and payload systems. While FPGAs are attractive from a performance per watt perspective, there are unique considerations when integrating them into a bus satellite system including their radiation tolerance and power requirements.

FPGAs offer high performance computing capabilities while consuming relatively low power. This is due to their inherent ability to run algorithms in a massively parallel fashion, as opposed to serial execution in a traditional processor. This also means that—from input to output—their propagation delay is typically in the nanoseconds range. An FPGA’s ability to perform complex computations at a reasonable power consumption makes it an optimal choice for satellite systems that rely on solar panels and batteries for power.

Unlike application-specific integrated circuits (ASICs), FPGAs are reprogrammable. This allows any satellite that uses FPGAs to adapt to unexpected scenarios, changing mission parameters or receiving updates without the need to replace hardware. This ability to remotely reconfigure the FPGA from Earth minimizes the cost and risk of satellite maintenance, thereby extending its total useful life. 

Space environments are harsh, filled with ionizing radiation, solar flares, and cosmic rays. It’s important for an FPGA to be able to withstand all of these and function reliably within the mission parameters. FPGA manufactures employ special radiation hardened (rad hard) and radiation tolerant design techniques to ensure uninterrupted operation despite exposure to radiation.

FPGAs typically have multiple power rails, each having unique voltage deviation and sequencing requirements that must be followed to maintain reliability. To determine the worst-case voltage deviations for a power supply, one must look at the product datasheet for specs that control the overall regulation for initial accuracy, operating temperature, radiation, and end of life. This can often be a challenging task on its own as some manufacturers do not provide all the data necessary to make the necessary calculations.

To properly budget the error sources for a power supply it’s good to list what the possible error sources are. The sources are voltage reference (VREF) accuracy, error amplifier voltage offset (EAVOS), feedback resistor tolerance, line and load regulation, output voltage ripple, load transients, and radiation effects. Typically, the VREF and EAVOS are lumped together at around ±1% with the feedback resistor, line and load regulation, and output ripple taking ±0.25% each. Load transients take up the largest portion of the budget (±2%) due to the types of capacitors available in the space market. Total Ionizing Dose (TID) and Single Event Effects (SEE) are the main concerns for radiation and can be allotted another ±2%.

The power sequencing requirements are important as they prevent high current latching scenarios. Since satellite systems operate on solar panels and batteries, unnecessary dissipated power is a huge concern. Power-on sequencing can be achieved easily with a power-good to enable (PGOOD-to-EN) daisy chain. Here, the PGOOD from one regulator is tied to the EN pin of a subsequent regulator to ensure the downstream regulator does not power up until the upstream device has achieved regulation. There are downsides to this method. If a regulator in the daisy chain encounters a fault during start up, the sequence does not progress and could potentially hold the system in an indeterminate state. It also does not account for power-down sequencing, which is equally critical.

It’s tempting to use another FPGA to sequence the power supply for the primary FPGA, but this results in a chicken-and-egg situation as the new FPGA will likely have its own power/sequencing requirements. This means it is better to use an event-based power supply sequencer that can account for both power-up and power-down sequencing while also providing voltage monitoring capability. This helps mitigate any indeterminate system states when one power supply in the sequence fails to power up for whatever reason.

While designing a complete power supply for an FPGA can be a daunting task, Renesas’ portfolio of high-reliability (Hi-Rel) reference designs take the guess work out of power supply design with robust parts from a manufacturer that has been serving the space community reliably for more than 70 years.