SRAM PUFs can form an unclonable identity for every chipset.
Chip designers are on the frontlines of innovation. Today’s advances in consumer electronics, medical devices, and autonomous driving, as well as high-performance computing (HPC), artificial intelligence (AI), and machine learning (ML) systems, all require increasingly complex chip designs.
As chip designs continue to grow more complicated, pushing the limits of Moore’s Law, it is becoming increasingly difficult to fit everything onto a single die. This is giving way to a new era in chip design in the form of chiplets, which are smaller, independent semiconductor components that can be combined to create more complex systems.
Chiplets are a new frontier for semiconductor innovation and represent a significant shift in the traditional monolithic approach to chip design and manufacturing. Rather than creating a semiconductor chip as a single, complete die, chiplets offer a modular approach, providing increased flexibility, improved yield, and lower costs. Chiplets can be designed and manufactured separately, then combined on a larger substrate to create a complete system, which is typically called a System-in-Package (SiP). When it comes to manufacturing, chiplets can scale down to new technology nodes easier, resulting in lower costs and faster time to market, while implementing specific functions at their optimal technology node. This is one reason the Gartner Group predicts that, by 2026, 20% of all semiconductor devices shipped will incorporate advanced 3D packaging technology, up from less than 1% in 2021.
Chiplets are rising in popularity because they enable manufacturers to create systems with more features and higher performance without having to design and manufacture all the components on a single chip. This is especially useful for complex systems, enabling applications leveraging artificial intelligence, machine learning, and high-performance computing. Additionally, chiplets can be easily upgraded or replaced in future iterations of the device, thereby allowing for easier maintenance and longer product lifetimes.
The risks of using chiplets
While the use of chiplets represents an exciting new approach to semiconductor design that could help to overcome the limitations of Moore’s Law and continue to drive innovation in the computing industry, it doesn’t come without risks.
Spreading functionality over multiple chiplets increases security risks. This is because communication between chiplets is easier to eavesdrop and alter than communication on an internal bus inside a single die system-on-chip (SoC) device. Also, different chiplets can be sourced from different vendors and come from different production facilities, which makes the supply chain even more complex and untrustworthy. During manufacturing, chiplets can be used that originate from untrusted manufacturers or, even worse, malicious chiplets can be inserted to serve as Trojan Horses in potential attacks. Finally, with the increasingly complex supply chain, there is also a bigger risk of intellectual property (IP) theft and of chiplets being overproduced by manufacturers.
The good news is that there are ways to ensure every chiplet in a system is genuine, does not come from an untrusted third party, and is sufficiently protected from “man-in-the-middle” attacks that may lead to eavesdropping and alteration of sensitive data. One of these techniques is to use SRAM-based physical unclonable functions (or PUFs) to protect against such security risks.
SRAM PUF technology
Due to deep submicron manufacturing process variations, every transistor has slightly different physical properties. These variations lead to small but measurable differences in terms of electronic properties, such as each transistor’s threshold voltage and gain factor. Since these process variations are not fully controllable during manufacturing, these physical device properties cannot be copied or cloned. By utilizing the intrinsic process variations caused by the silicon manufacturing process, PUFs create unique “silicon fingerprints” for every die to serve as identifiers that can then be used to validate the authenticity of each individual chiplet.
The SRAM PUF, which is based on the behavior of standard SRAM memory, is available in almost any digital chiplet. Every SRAM cell has its own preferred power-up state resulting from unique local differences in the threshold voltages of its transistors. This uniqueness is captured in a so-called PUF response by reading the power-up values of “uninitialized” SRAM memory. Hence, an SRAM PUF response yields a unique and random pattern of 0s and 1s. This pattern is like a fingerprint for a chiplet since it is unique to a particular SRAM and hence a particular chiplet.
In addition to being used to identify chiplets in the supply chain, these silicon fingerprints can also be turned into a cryptographic key that is unique for the silicon from which it is derived. This root key is reliably reconstructed from the PUF whenever it is needed by the system, without a need for storing it in any form of memory. This means that when the device is powered off, no secret key is present in any form of memory. In effect, the root key is “invisible” to attackers, which makes storage of keys based on PUFs extremely secure.
Combining the availability of this root key with certain cryptographic algorithms allows for communications between individual chiplets to be encrypted, providing security for the complete system. As an added benefit, since the root key is never stored, security can still be guaranteed even if not every individual chiplet contains non-volatile memory (NVM). This is especially important when certain chiplets are produced using advanced technology nodes in which NVM is not always available.
Enhancing security and trust
A first level of trust validation is obtained by using SRAM PUFs to identify chiplets and detect counterfeit copies. Only a small amount of SRAM on the chiplet is needed to create a fingerprint for that chiplet, and this fingerprint can be stored in a database. Identifying chiplets based on the fingerprints in this database works for any chiplet and enables tracking from the earliest moment in production. This offers a robust and scalable solution, without the need to store an identity or key on the device, enabling the identification and tracking of chiplets that have no NVM available.
A higher level of trust validation (for chiplet and data authentication or for IP binding, for example) can be achieved by extracting cryptographic keys from the PUF and using those keys in combination with symmetric cryptography. A Key Extractor function reliably reconstructs a cryptographic key from an SRAM PUF whenever a key is needed by the system, without a need for storing it in any form of NVM. So, when the device is powered off, no secret keys are present in memory making root keys “invisible” to attackers. Therefore, storage of keys with PUFs adds a layer of security. An additional benefit is that this can also be performed on chiplets that have no NVM available (this scenario is very likely when chiplets are created in advanced technology nodes, where NVM causes scaling issues). This technology can even be retrofitted on existing chiplets. The symmetric crypto algorithms enable the encryption of local data on the chiplet as well as facilitating secure connections, using PUF-based chiplet-unique symmetric keys that are only known within the SiP. Again, this can all be achieved without the need for programming keys or having NVM on the chiplet to store keys.
The strongest level of authentication can be achieved by combining SRAM PUF-based keys with algorithms for asymmetric cryptography that are connected to a traditional public key infrastructure (PKI) system, which is a system used to secure communication and transactions between different entities in a network. In this case, every chiplet obtains a device certificate from the manufacturer guaranteeing its authenticity, which can be verified in a cryptographic authentication protocol by using the manufacturer’s public key. A certificate is only as strong as the protection of the private key, so SRAM PUFs are particularly well suited for protecting these keys and therefore the authenticity of the chiplets.
The cryptographic keys extracted from SRAM PUFs can be used to form unclonable identities for every individual chiplet, which allow for identification and authentication of the chiplets throughout the entire supply chain and even in the field. Combining the keys extracted from PUFs with certain cryptographic algorithms allows for encryption of data on chiplets as well as for communications between individual chiplets to be encrypted and authenticated, thereby providing security for the complete system.
Since the root keys are never stored, cannot be altered, and cannot be copied to other chiplets, SRAM PUFs create a hardware root of trust on every individual chiplet. This even works on chiplets produced in advanced technology nodes where NVM is often not an option. Hence, SRAM PUF technology is a valuable tool to ensure our advanced semiconductor designs are created in the most secure and trustworthy way.